Current trends call for increasingly restrictive chip design rules that call for the chip size to decrease, while also requiring the number of connections to a chip to stay the same or increase. Thus, as chip sizes decrease and the number of connections stays the same or increases, the density of connections to the chip must likewise increase.
For purposes of this application, the distance between a point on a chip (die) and a corresponding point on an adjacent chip lying in a row or column of an array of die on a wafer is referred to as the die pitch. Note, chips and die are referred to interchangeably herein. The contact pitch (CP) of a chip is the distance between adjacent electrical contacts on the chip. Often, fan-outs (leads) are attached to the contacts of a chip. The electrical connections of the fan-out are referred to as terminals. The terminal pitch (TP), or ball pitch (BP) when solder balls are placed on the terminals, is the distance between adjacent terminal connection points. The pad pitch (PP) is the distance between adjacent pads on a chip package or printed wiring board (PWB).
Conventional solutions to this connection density problem are usually directed to modifying the wire bonding between the chip and its packaging, or prepackaging the chip for later assembly on a printed wiring board. However, these solutions are inadequate to continue addressing this problem; particularly as chip designs evolve.